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Jan
22ndThe VCE Model : Yes, it is different
This post comes out of a slide deck I authored last week for a partner event. I decided I was going to try and illustrate why the VCE model really is such a different approach to other datacenter and private cloud models. Normally my blog is light on vendor specific commentary. I see myself more as a virtualization geek who just happens to work for an awesome company (EMC) than a hardcore analysis/blogger. But I have seen so much messaging lately that distorts the VCE message, I really felt the need to offer my own perspective.
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Sep
21stDon’t Panic : Mirror Positions
What happens to a VM that is hosted on a VMFS datastore when you physically remove both of the mirrored drives from the array? Kernel panic/blue screen right? What if you were replicating that LUN to another site using array based replication? Would the VM still crash? Not if you’re using Symmetrix Remote Data Facility, Synchronous mode (SRDF-S). Let’s rewind a bit. One of the main architectural attributes that distinguish an enterprise array from a mid-range array is the connectivity and cache model. In a midrange array you will typically see an active/passive controller from a LUN path ownership perspective, while an enterprise array provides an active/active controller model for because the front-end adapters don’t “own” the LUN per-se (Yes, I’m oversimplifying this a wee bit, but only to skip past this detail and get to my point!). As you can see in the simplified images, enterprise arrays provide a complete cache abstraction layer between front end controllers (host side) and back end controllers (drive side). In other words, if you want to send a command or piece of data from the host to the drive, you must do so through cache. This kind of abstraction, much like the server abstraction provided by VMware ESX, is a key enabler for much of the genius that occurs in all shared storage platforms. In the world of Symmetrix, a mirror-position is a device in the system that a segment of cache refers to. When a write occurs, it is acknowledged by cache, [...]
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